The present invention relates to a booster circuit device, and more specifically to a booster circuit device suitable for use as a voltage supply for a circuit of small current dissipation such as a liquid crystal driving circuit.
As a circuit related to the present invention, there exists a double booster circuit for driving a liquid crystal as shown in FIG. 1.
In FIG. 1, when a switch SW1 and a switch SW2 are first connected to an a-side contact respectively, a charge Qa1 =Ca.times.Va is accumulated in a capacitance Ca. After that, when the switch SW1 and the switch SW2 are both connected to a b-side contact respectively, a charge Qa1 is distributed to a capacitance Ca and a capacitance Cb, respectively. Here, if the capacitances Ca and Cb are equal to each other, a voltage Vb1 at an output terminal Vb is the same as a voltage Va.
Successively, when the switch SW1 and the switch SW2 are both connected again to the a-side contact respectively, a charge Qa2=Ca.times.Va is accumulated in the capacitance Ca, and a charge Qb2=Cb.times.Va is accumulated in the capacitance Cb.
Further, when the switch SW1 and the switch SW2 are both connected again to the b-side contact respectively, the charge is distributed and an output voltage at the output terminal Vb is Vb=3/2.times.Va.
When the above-mentioned switching operation is repeated, the output voltage Vbn (n is a 3 or more integer) approaches roughly a voltage of 2.times.Va gradually.
FIG. 2 shows the same double booster circuit shown in FIG. 1, in which the circuit is composed of MOS transistors. The switch SW1 is composed of a P-channel transistor P3 and an N-channel transistor N1, and the switch SW2 is composed of two P-channel transistors P1 and P2. Further, the operation of both switches SW1 and SW2 is controlled by a control circuit 41 having a level shifter circuit 41a and an inverter INV1. The control circuit 41 operates on the basis of a drive signal CLK applied to the level shifter circuit 41a from the outside.
In this control circuit 41, at the initial condition, a supply voltage Va is applied to only a terminal Va, and an output terminal Vb is set to the ground potential. The P-channel transistor P2 (whose gate is connected to the output terminal of the level shifter circuit 41a) and the P-channel transistor P1 (whose gate is connected to the output terminal of the inverter INV1) are both kept turned on because a low-level is applied to the gates thereof. Therefore, a voltage Va can be outputted from the output terminal Vb.
Under these conditions, when the potential of the drive signal CLK changes to the voltage Va, this voltage Va is applied to the gate of the N-channel transistor N1 of the switch SW1 and an input of the level shifter circuit 41a of the control circuit 41, so that the N-channel transistor N1 and the P-channel transistor P1 are both turned on. These conditions correspond to the status where the switches SW1 and SW2 shown in FIG. 2 are both connected to the a-side contact, respectively.
When the drive signal CLK changes to the ground potential, since the P-channel transistor P2 and the P-channel transistor P3 are both turned on, these conditions correspond to the status where the switches SW1 and SW2 are both connected to the b-side contact, respectively. By repeating the above-mentioned operation, a voltage roughly equal to the voltage 2.times.Va can be outputted from the output terminal Vb.
FIG. 3 shows an equivalent circuit of a liquid crystal panel. In a display panel 50, a plurality of common pixel electrode signal lines for supplying liquid crystal drive signals COM1 to COMn and a plurality of pixel electrode signal lines for supplying liquid crystal drive signals SEG1 to SEGn are arranged into a matrix pattern. At the respective intersections between both the signal lines, liquid crystal pixels exist, which are denoted as a capacitive load 51, respectively.
FIG. 4(a) shows the operation waveforms of the common pixel electrode signals COM1 to COMn for driving these liquid crystals and the pixel electrode signals SEG1 to SEGn applied to the respective pixel electrodes. Here, Va is a supply voltage given from the outside as already explained, Vb is an output voltage of the double booster circuit, and Vc is an output voltage of a triple booster circuit.
The liquid crystal for one pixel provided at each intersection between the signal lines is set to a light release status when a potential difference between the drive signals SEG and COM becomes the maximum voltage Vc, and to a light shade (non-release) status when the potential difference reaches (Vb-Vc).
Now, the dissipated current I.sub.disp of the liquid crystal drive circuit as described above can be expressed as I.sub.disp =f.sub.D .times.C.sub.L .times.V.sub.D, because the liquid crystal is a capacitive load, where f.sub.D denotes the frequency of the drive signals COM and SEG; C.sub.L denotes a liquid crystal capacitance; and V.sub.D denotes a display potential. As described above, since the liquid crystal is of capacitive load, current flows only when the potentials of the drive signals SEG and COM change, as shown in FIG. 4(b), so that some current is dissipated.
Further, it is necessary to suppress the output voltage of the booster circuit for supplying the supply voltage to the above-mentioned drive circuit within fluctuations of .+-.0.1 V, in order to prevent the deterioration of display quality even if the dissipated current of the liquid crystal drive circuit changes largely as at the maximum point. Accordingly, the capacitances Ca and Cb and the frequency f.sub.D of the drive signal of the booster circuit must be determined so that the above-mentioned condition can be satisfied.
Therefore, the dissipated current I.sub.P of the booster circuit shown in FIG. 2 can be expressed as follows: EQU I.sub.P =f.sub.CLK .times.C.sub.P .times.V.sub.P ( 1)
where f.sub.CLK denotes the frequency of the booster drive signal; C.sub.P denotes the parasitic capacitances of the capacitance Ca, the control circuit 41 and the switches SW1 and SW2; and V.sub.P denotes the supply voltage.
As described above, since the magnitude of the dissipated current can be expressed by f.times.C.times.V in both the drive circuit and the booster circuit, in order to reduce the fluctuation width of the display supply voltage less than .+-.0.1 V, the following conditions are required to be satisfied: EQU Frequency f.sub.D of the drive circuit drive signals COM and SEG &lt;Frequency f.sub.CLK of the booster circuit drive signal (2) EQU Liquid crystal capacitance CL&lt;Booster circuit capacitance (3)
The above-mentioned conditions indicate that the dissipated current of the booster circuit occupies a larger part of the whole dissipated current.
Further, as with the case of the circuit shown in FIG. 5, when a drive signal is applied from a divider circuit 61 to a booster circuit 62 uniformly, since the frequency of the drive signal is constant irrespective of the value of dissipated current I.sub.disp as shown in FIG. 6(a), it is impossible to reduce the current dissipation of the liquid crystal drive circuit.